Analysis and Design of Cmos Wide-band Low Noise Amplifiers

The implementation of Low Noise Amplifier (LNA) front-ends is one of the challenging aspects in emerging Ultra Wide-Band (UWB) radio frequency (RF) systems. As it is highly desirable to achieve complete system-on-chip (SoC) integration, several CMOS based LNA implementations have been reported recently. The first part of this thesis presents a comparative study that helps designers understand the merits and demerits of different wide-band LNA implementation choices. In order to enable a quantitative comparison, a Figure Of Merit (FOM) that captures the tradeoffs among linearity, noise figure (NF), power dissipation and utilization of raw technology speed is proposed. The obtained survey results based on this FOM suggest that distributed amplification outperforms approaches that utilize wide-band matching networks or noise cancellation techniques. The second part of this thesis deals with the design and analysis of low power distributed amplifiers. In order to understand the tradeoffs better, the factors affecting gain, power and bandwidth of a distributed amplifier are discussed in detail. This thesis concludes with the design and simulation of the proposed low power architectures in 0.18μ CMOS technology.